X86 instruction listings
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Introduction
The x86 instruction set has undergone numerous changes over time. Most of them were to add new functionality to the instruction set.
x86 Integer Instructions
This is the full 8086-8088 instruction set, but most, if not all of these instructions are available in 32-bit mode, they just operate on 32 bit registers (eax, ebx, etc) and values instead of their 16-bit (ax, bx, etc) counterparts. See also x86 assembly language for a quick tutorial for this chip.
Original 8086/8088 instructions
- AAA – ASCII adjust AL after addition
- AAD – ASCII adjust AX before division
- AAM – ASCII adjust AX after multiply
- AAS – ASCII adjust AL after subtraction
- ADC – Add with carry
- ADD – Add
- AND – Logical AND
- CALL – Call procedure
- CBW – Convert byte to word
- CLC – Clear carry flag
- CLD – Clear direction flag
- CLI – Clear interrupt flag
- CMC – Complement carry flag
- CMP – Compare operands
- CMPSB – Compare bytes
- CMPSW – Compare words
- CWD – Convert word to doubleword
- DAA – Decimal adjust AL after addition
- DAS – Decimal adjust AL after subtraction
- DEC – Decrement by 1
- DIV – Unsigned divide
- ESC –
- HLT – Enter halt state
- IDIV – Signed divide
- IMUL – Signed multiply
- IN – Input from port
- INC – Increment by 1
- INT – Call to interrupt
- INTO – Call to interrupt
- IRET – Interrupt return
- Jxx – Jump if condition
- JA, JAE, JB, JBE, JC, JCXZ, JE, JG, JGE, JL, JLE, JNA, JNAE, JNB, JNBE, JNC, JNE, JNG, JNGE, JNL, JNLE, JNO, JNP, JNS, JNZ, JO, JP, JPE, JPO, JS, JZ
- JMP – Jump
- LAHF – Load flags into AH register
- LDS –
- LEA – Load Effective Address
- LES – Load ES with pointer
- LOCK – Assert LOCK# signal
- LODSB – Load byte
- LODSW – Load word
- LOOP/LOOPx – Loop control
- LOOPE, LOOPNE, LOOPNZ, LOOPZ
- MOV – Move
- MOVSB – Move byte from string to string
- MOVSW – Move word from string to string
- MUL – Unsigned multiply
- NEG – Two's complement negation
- NOP – No operation
- NOT – Negate the operand
- OR – Logical OR
- OUT – Output to port
- POP – Pop data from stack
- POPF – Pop data into flags register
- PUSH – Push data onto stack
- PUSHF – Push flags onto stack
- RCL – Rotate left (with carry)
- RCR – Rotate right (with carry)
- REPxx – Repeat string
- REP, REPE, REPNE, REPNZ, REPZ
- RET – Return from procedure
- RETF –
- RETN –
- ROL – Rotate left
- ROR – Rotate right
- SAHF – Store AH into flags
- SAL – Shift left (multiply)
- SAR – Shift right (signed divide)
- SBB – Subtraction with borrow
- SCASB – Compare byte string
- SCASW – Compare word string
- SHL – Shift left (multiply)
- SHR – Shift right (unsigned divide)
- STC – Set carry flag
- STD – Set direction flag
- STI – Set interrupt flag
- STOSB – Store byte in string
- STOSW – Store word in string
- SUB – Subtraction
- TEST – Logical compare (AND)
- WAIT – Wait until BUSY# pin is inactive (numeric coprocessor)
- XCHG – Exchange data
- XLAT – Table look-up translation
- XOR – Exclusive OR
Added with 80186/80188
BOUND, ENTER, INSB, INSW, LEAVE, OUTSB, OUTSW, POPA, PUSHA, PUSHW
Added with 80286
ARPL, CLTS, LAR, LGDT, LIDT, LLDT, LMSW, LSL, LTR, SGDT, SIDT, SLDT, SMSW, STR, VERR, VERW
Added with 80386
BSF, BSR, BT, BTC, BTR, BTS, CDQ, CMPSD, CWDE, INSD, IRETD, IRETDF, IRETF, JECXZ, LFS, LGS, LODSD, LOOPD, LOOPED, LOOPNED, LOOPNZD, LOOPZD, LSS, MOVSD, MOVSX, MOVZX, OUTSD, POPAD, POPFD, PUSHAD, PUSHD, PUSHFD, SCASD, SETA, SETAE, SETB, SETBE, SETC, SETE, SETG, SETGE, SETL, SETLE, SETNA, SETNAE, SETNB, SETNBE, SETNC, SETNE, SETNG, SETNGE, SETNL, SETNLE, SETNO, SETNP, SETNS, SETNZ, SETO, SETP, SETPE, SETPO, SETS, SETZ, SHLD, SHRD, STOSD
Added with 80486
BSWAP, CMPXCHG, INVD, INVLPG, RSM, WBINVD, XADD
Added with Pentium
CMPXCHG8B, CPUID, RDMSR, RDPMC*, RDTSC, WRMSR
- RDPMC was introduced in the Pentium Pro processor and the Pentium processor with MMX technology.
Added with Pentium Pro
CMOVA, CMOVAE, CMOVB, CMOVB, CMOVE, CMOVG, CMOVGE, CMOVL, CMOVLE, CMOVNA, CMOVNAE, CMOVNB, CMOVNBE, CMOVNC, CMOVNE, CMOVNG, CMOVNGE, CMOVNL, CMOVNLE, CMOVNO, CMOVNP, CMOVNS, CMOVNZ, CMOVO, CMOVP, CMOVPE, CMOVPO, CMOVS, CMOVZ
Added with Pentium II
SYSENTER, SYSEXIT
x87 Floating Point Instructions
Original 8087 instructions
F2XM1, FABS, FADD, FADDP, FBLD, FBSTP, FCHS, FCLEX, FCOM, FCOMP, FCOMPP, FDECSTP, FDISI, FDIV, FDIVP, FDIVR, FDIVRP, FENI, FFREE, FIADD, FICOM, FICOMP, FIDIV, FIDIVR, FILD, FIMUL, FINCSTP, FINIT, FIST, FISTP, FISUB, FISUBR, FLD, FLD1, FLDCW, FLDENV, FLDENVW, FLDL2E, FLDL2T, FLDLG2, FLDLN2, FLDPI, FLDZ, FMUL, FMULP, FNCLEX, FNDISI, FNENI, FNINIT, FNOP, FNSAVE, FNSAVEW, FNSTCW, FNSTENV, FNSTENVW, FNSTSW, FPATAN, FPREM, FPTAN, FRNDINT, FRSTOR, FRSTORW, FSAVE, FSAVEW, FSCALE, FSQRT, FST, FSTCW, FSTENV, FSTENVW, FSTP, FSTSW, FSUB, FSUBP, FSUBR, FSUBRP, FTST, FWAIT, FXAM, FXCH, FXTRACT, FYL2X, FYL2XP1
Added with 80287
FSETPM
Added with 80387
FCOS, FLDENVD, FNSAVED, FNSTENVD, FPREM1, FRSTORD, FSAVED, FSIN, FSINCOS, FSTENVD, FUCOM, FUCOMP, FUCOMPP
Added with Pentium Pro
FCMOVB, FCMOVBE, FCMOVE, FCMOVNB, FCMOVNBE, FCMOVNE, FCMOVNU, FCMOVU, FCOMI, FCOMIP, FUCOMI, FUCOMIP, FXRSTOR, FXSAVE
SIMD Instructions
MMX instructions
EMMS, MOVD, MODQ, PACKSSDW, PACKSSWB, PACKUSWB, PADDB, PADDD, PADDSB, PADDSW, PADDUSB, PADDUSW, PADDW, PAND, PANDN, PCMPEQB, PCMPEQD, PCMPEQW, PCMPGTB, PCMPGTD, PCMPGTW, PMADDWD, PMULHW, PMULLW, POR, PSLLD, PSLLQ, PSLLW, PSRAD, PSRAW, PSRLD, PSRLQ, PSRLW, PSUBB, PSUBD, PSUBSB, PSUBSW, PSUBUSB, PSUBUSW, PSUBW, PUNPCKHBW, PUNPCKHDQ, PUNPCKHWD, PUNPCKLBW, PUNPCKLDQ, PUNPCKLWD, PXOR
3DNow! instructions
FEMMS, PAVGUSB, PF2ID, PFACC, PFADD, PFCMPEQ, PFCMPGE, PFCMPGT, PFMAX, PFMIN, PFMUL, PFRCP, PFRCPIT1, PFRCPIT2, PFRSQIT1, PFRSQRT, PFSUB, PFSUBR, PI2FD, PMULHRW, PREFETCH, PREFETCHW
3DNow!+ instructions
PF2IW, PFNACC, PFPNACC, PI2FW, PSWAPD
SSE instructions
SSE SIMD Floating-Point Instructions
ADDPS, ADDSS, ANDNPS, ANDPS, CMPPS, CMPSS, COMISS, CVTPI2PS, CVTPS2PI, CVTSI2SS, CVTSS2SI, CVTTPS2PI, CVTTSS2SI, DIVPS, DIVSS, LDMXCSR, MAXPS, MAXSS, MINPS, MINSS, MOVAPS, MOVHLPS, MOVHPS, MOVLHPS, MOVLPS, MOVMSKPS, MOVNTPS, MOVSS, MOVUPS, MULPS, MULSS, ORPS, RCPPS, RCPSS, RSQRTPS, RSQRTSS, SHUFPS, SQRTPS, SQRTSS, STMXCSR, SUBPS, SUBSS, UCOMISS, UNPCKHPS, UNPCKLPS, XORPS
SSE SIMD Integer Instructions
PAVGB, PAVGW, PEXTRW, PINSRW, PMAXSW, PMAXUB, PMINSW, PMINUB, PMOVMSKB, PSADBW, PSHUFW
SSE Cacheability and Memory Ordering Instructions
MASKMOVQ, MOVNTPS, MOVNTQ, PREFETCH0, PREFETCH1, PREFETCH2, PREFETCHNTA, SFENCE
SSE2 instructions
SSE2 Floating-Point Instructions
ADDPD, ADDSD, ANDNPD, ANDPD, CMPPD, CMPSD*, COMISD, CVTDQ2PD, CVTDQ2PS, CVTPD2DQ, CVTPD2PI, CVTPD2PS, CVTPI2PD, CVTPS2DQ, CVTPS2PD, CVTSD2SI, CVTSD2SS, CVTSI2SD, CVTSS2SD, CVTTPD2DQ, CVTTPD2PI, CVTPS2DQ, CVTTSD2SI, DIVPD, DIVSD, MAXPD, MAXSD, MINPD, MINSD, MOVAPD, MOVHPD, MOVLPD, MOVMSKPD, MOVSD*, MOVUPD, MULPD, MULSD, ORPD, SHUFPD, SQRTPD, SQRTSD, SUBPD, SUBSD, UCOMISD, UNPCKHPD, UNPCKLPD, XORPD
- CMPSD and MOVSD have the same name as the string instruction mnemonics CMPSD (CMPS) and MOVSD (MOVS), however, the formers refer to scalar double-precision floating-points whereas the latters refer to doubleword strings.
SSE2 SIMD Integer Instructions
MOVDQ2Q, MOVDQA, MOVDQU, MOVQ2DQ, PADDQ, PMULUDQ, PSHUFHW, PSHUFLW, PSHUFD, PSLLDQ, PSRLDQ, PUNPCKHQDQ, PUNPCKLQDQ
SSE2 Cacheability Instructions
CLFLUSH, LFENCE, MASKMOVDQU, MFENCE, MOVNTDQ, MOVNTI, MOVNTPD, PAUSE
SSE3 instructions
ADDSUBPD, ADDSUBPS, FISTTP, HADDPD, HADDPS, HSUBPD, HSUBPS, LDDQU, MONITOR, MOVDDUP, MOVSHDUP, MOVSLDUP, MWAIT