Von Neumann architecture

The so-called von Neumann architecture is a model for a computing machine that uses a single storage structure to hold both the set of instructions on how to perform the computation and the data required or generated by the computation. Such machines are also known as stored-program computers. The separation of storage from the processing unit is implicit in this model.

The architecture is named after mathematician John von Neumann who wrote First Draft of a Report on the EDVAC, dated June 30, 1945, an early written account of a general purpose stored-program computing machine (see the external link). The term von Neumann architecture, however, is seen as doing injustice to von Neumann's collaborators, notably John William Mauchly and J. Presper Eckert who conceived of the stored-program concept in 1944, during their work on ENIAC (which was not a stored-program computer). It is clear that the idea of a stored-program computer originated at the Moore School of Electrical Engineering at the University of Pennsylvania (where the ENIAC was being built) before von Neumann even knew of the machines existance, but the exact person who originated the idea is unknown. The term is now avoided in many circles. Alan Turing presented a paper on February 19, 1946, which was the first complete design for a stored-program computer, the Pilot ACE.

By treating the instructions in the same way as the data, a stored-program machine can easily change the instructions. In other words the machine is reprogrammable. One important motivation for such a facility was the need for a program to increment or otherwise modify the address portion of instructions. This became less important when index registers and indirect addressing became customary features of machine architecture.

Current machine architecture makes small-scale self-modifying code unnecessary, while processor pipelining and caching schemes makes it inefficient. The practice is now generally deprecated. Of course, on a large scale, the ability to treat instructions as data is what makes compilers possible. It is also a feature that can be exploited by computer viruses when they add copies of themselves to existing program code. The problem of unauthorized code replication can be addressed by the use of memory protection support, and in particular virtual memory architectures.


The von Neumann bottleneck

The separation between the CPU and memory leads to what is known as the von Neumann bottleneck (a term coined by John Backus in his 1977 ACM Turing award lecture). The bandwidth, or the data transfer rate, between the CPU and memory is very small in comparison with the amount of memory. In modern machines it is also very small in comparison with the rate at which the CPU itself can work. Under some circumstances (when the CPU is required to perform minimal processing on large amounts of data), which are becoming much more frequent as CPU speeds increase and large amounts of memory become common, this gives rise to a serious limitation in overall effective processing speed, because the CPU is continuously forced to wait for vital data to be transferred to or from memory. According to Backus:
Surely there must be a less primitive way of making big changes in the store than by pushing vast numbers of words back and forth through the von Neumann bottleneck. Not only is this tube a literal bottleneck for the data traffic of a problem, but, more importantly, it is an intellectual bottleneck that has kept us tied to word-at-a-time thinking instead of encouraging us to think in terms of the larger conceptual units of the task at hand. Thus programming is basically planning and detailing the enormous traffic of words through the von Neumann bottleneck, and much of that traffic concerns not significant data itself, but where to find it.

The cache hierarchy between CPU and main memory addresses some of the performance issues of the bottleneck. It is less clear whether the intellectual bottleneck that Backus criticized has changed much since 1977. Backus's proposed solution has not had a major influence.

On the other hand, modern functional programming and object-oriented programming are much less geared towards pushing vast numbers of words back and forth than, say, Fortran.

Earliest stored-program computers

Before the advent of the stored-program computer, computers were contolled either by executing one instruction at a time from punched cards or a paper tape (e.g. the Harvard Mark I) or wired for the current problem to be solved (e.g. the ENIAC). When the ENIAC was being designed, it was clear that reading instructions from punched cards or paper tape would not be fast enough since the ENIAC was designed to execute instructions at a much higher rate. The ENIAC was designed to be rewired for each new problem, but before the ENIAC was finished, it was clear that a better system was needed. The initial report on the proposed EDVAC was written during the time the ENIAC was being built, and it contained the idea of the stored program, where instructions were stored in high-speed memory, so they could be quickly accessed for execution.

The EDVAC was the first computer designed using the idea of the stored program, but it took five years to complete. The EDSAC is considered to be the first practical stored-program computer. Below are some dates pertaining to the first few stored-program computers, but the date information is difficult to put into proper order because some dates are for first running a test program, some dates are the first time the computer was demonstrated or completed, and some dates are for the first delivery or installation.

The Manchester Small-Scale Experimental Machine was the first computer to run a stored program. It ran a factoring program for 52 minutes on June 21, 1948. The BINAC ran a test program in March 1949, although it wasn't completed until September 1949. The Manchester Mark I, which grew out of the SSEM project, was available in April 1949. The EDSAC ran its first program on May 6, 1949. The EDVAC was delivered in August 1949, but it had problems that kept it from being put into regular operation until 1951. The SEAC was demonstrated in April 1950. The Pilot ACE ran its first program on May 10, 1950 and was demonstrated in December 1950. The SWAC was completed in July 1950. The first ERA Atlas (later the commercial ERA 1100) was installed in December 1950.

See also


  • The First Computers: History and Architectures, edited by Ral Rojas and Ulf Hashagen, MIT Press, 2000. ISBN 0-262-18197-5.

External link

es:Arquitectura Von Neumann fr:Architecture de von Neumann is:Von Neumann arkitektr it:Architettura von Neumann ja:ノイマン型 nl:Von Neumann-cyclus pl:Architektura von Neumanna sv:Von Neumann-arkitekturen uk:Архітектура фон Ноймана zh:冯·诺伊曼结构


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