Property Specification Language
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Property Specification Language is a language standardized by Accellera for specifying properties or assertions about hardware designs. It comes in two flavors, one for VHDL and one for Verilog.
More information is available at
- Accellera (http://www.accellera.org/)
- The PSL/Sugar Consortium (http://www.pslsugar.org/)
- Designers guide to PSL (http://www.doulos.com/knowhow/psl/)