Parity bit

From Academic Kids

In computing and telecommunication, a parity bit is a binary digit that takes on the value zero or one to satisfy a constraint on the overall parity of a binary number. The parity scheme in use must be specified as even or odd. Parity is even if there are an even number of '1' bits, and odd otherwise.

Examples :

The parity of the bitstream 10111101 is even (there are 6 '1' bits). The parity bit will be 0.

The parity of the bitstream 01110011 is odd (there are 5 '1' bits). The parity bit will be 1.

The parity of the bitstream 00000000 is even (zero is taken to be even). The parity bit will be 0. The parity of a null or non-existent bitstream, also with zero '1' bits, is also 0.

In serial data transmission, a common format is 7 data bits, an even parity bit, and one or two stop bits. Even parity means that the total number of 1 bits must be even. This format neatly accommodates all the 7-bit ASCII characters in a convenient 8-bit byte. Other formats are possible; 8 bits of data plus a parity bit can convey all 8-bit byte values. In serial communication contexts, parity is usually generated and checked by interface hardware (e.g., a UART) and, on reception, the result made available to the CPU (and so to, for instance, the operating system) via a status bit in a register in the interface hardware. Recovery from the error is usually done by retransmitting the data, the details of which are usually handled by software (e.g., the operating system I/O routines).

Parity bits are mainly used as a very simple form of redundancy check. A single parity bit can detect the alteration of any odd number of bits (including the most common case of one bit), but cannot detect the alteration of an even number of bits. Nor does it include enough information to correct any error.

Because of its simplicity, parity is used in many hardware applications where an operation can be repeated in case of difficulty, or where simply detecting the error is helpful. For example, the SCSI bus uses parity to detect transmission errors, and many microprocessor instruction caches include parity protection. Because the I-cache data is just a copy of main memory, it can be thrown away and re-fetched if it is found to be corrupted.

Even parity is actually a special case of a cyclic redundancy check, where the 1-bit CRC is generated by the polynomial x+1.

See also



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