Talk:ARM architecture

Is it the case that Acorn Computers were refused access to the Intel 80286? According to a near contemporary commentary by Dick Pountain that I recall reading, the company's technicians were unhappy to adopt the 80286 because its interrupt performance was markedly inferior to that of the 6502 and they regarded high interrupt performance as essential to support the direction they were taking in their system software. Alan Peakall 17:32 Nov 15, 2002 (UTC)

They were refused access. I believe they wanted to hack the design to suit their purposes, and Intel didn't want to licence those rights unto them.

Initiation of the ARM project

It is said that Acorn wanted to have access to the 286 core and use it on their own silicon. Intel were not impressed. A story in the Grauniad (http://www.stairwaytohell.com/articles/GUARDIAN-Acorn.html) says:

Hauser believed that to design a really efficient computer, you also needed to design the chip inside it. Originally, Acorn planned to use Intel's 286 chip in its Archi-medes computer. But because Intel would not let it license the 286 core and adapt it, Acorn decided to design its own.

An Electronics Weekly article (http://atterer.net/acorn/arm.html) quoted Hauser as saying

"I asked Intel for the 286 core and they said we're not interested in selling cores - only microprocessors."

However, I suspect that that particular story was fabricated by Hauser as a post-hoc validation of his "IT Guruship" & therefore a justifcation for his venture Capital "prowess".

The Wikipedia articles on Acorn and the ARM make the decision to design a processor sound as though it was made for mundane reasons. The reality is much more intersting. It very much seems like Acorn was a playground for some very talented people (Wilson & Furber being the most easily identified) and the Acorn RISC Machine seems actually to have been developed for the simple reason that the engineers wanted to play and, more importantly, were able to play. For example, in an Acorn User (http://www.stairwaytohell.com/articles/AU-AcornHistory.html) article on the history of acorn, it is said that:

The most advanced division of the Advanced Research and Development section was, during 1984, working on a new processor chip incorporating the idea of a reduced instruction set - an idea that was at that time quite revolutionary.

Even within Acorn few people knew about the project - it took Roger Wilson some time to tell his boss, Hauser, what he was doing, let alone anyone else.

This ability to "play" was in a large part permitted by the (chaotic?) management structure at Acorn in the early-80s. In designing the replacement for the BBC (inc Master), the Acorn engineers had access to the TUBE. This allowed them to test processors in a fairly unique way. It does seem to be true that they were unhappy with the interrupt responses of the 68000 in particular. In the Acorn User Acorn history (http://www.stairwaytohell.com/articles/AU-AcornHistory.html), Roger Wilson is quoted as saying that

The jump to 32-bit was a result of all the work on second processors for the BBC micro. By using the Tube, we were the only people in the world who could use the same operating system with all the different processors. We could rate their performance. We ran through every single processor - and the 8086 and 68000 chips that we tried were really slow. They couldn't even keep up with the Tube protocols that the 6502 managed.'

The Electronics Weekly article (http://atterer.net/acorn/arm.html) gives a good idea of what was actually going on when the ARM was born.

68000

Very interesting article at Real World Technologies (http://www.realworldtech.com/page.cfm?ArticleID=RWT110900000000):

Acorn briefly considered the Motorola 68000 but rejected on the ground that its inclusion of long running uninterruptible instructions, like divide DIVS, would have more than doubled its interrupt latency compared to the 6502. This meant that expensive direct memory access (DMA) hardware would have been needed to support fast input/output operations.

32016

Mark Smotherman's web page (http://www.cs.clemson.edu/~mark/admired_designs.html#wilson) reports Sophie Wilson:

The 32016 first exposed the value of memory bandwidth to Steve Furber and I, showed how making things over-complex led to exceedingly long implementation times with loads of bugs in the implementation, and showed that however hard you tried to approach what compiler writers claimed they wanted, you couldn't satisfy them (no, I never did use a VAX). And an 8MHz 32016 was completely trounced in performance terms by a 4MHz 6502...

Lmno 22:21, 27 Nov 2004 (UTC)

Arc

What, no mention of the Archimedes? Phil 15:58, Nov 27, 2003 (UTC)

There should be a disambiguation page for ARM

Since so many people know better ARM than Acorn Risc Machine, it is highly needed a disambiguation page with arm, the part of the body.

Sorry, but i don't know how to create one, and unfortunately have no time now to learn how to do it. :(

Hgfernan 14:52, 19 Jul 2004 (UTC)

Merger

This article needs to be merged with the stub at Advanced RISC Machines. I would suggest moving everything to Advanced RISC Machines as the name 'Acorn RISC Machine' is now only of historical significance and not commonly used. In fact 'Advanced RISC Machines' isn't commonly used either, so an alternative would be to put everything at ARM Ltd or petition to take over the ARM page and move the disambiguation to ARM (disambiguation) as per IBM. -- Solipsist 07:14, 21 Oct 2004 (UTC)

OK so it was a mistake to move this page to ARM Ltd, since the majority of links were to the core design, but quite a few were just mixed up. I still think this page would be better at just ARM since few of the other ARM acronyms a common, but 'ARM architecture' will have to do for now. Next plan is to move Advanced RISC Machines to ARM Ltd which will concentrate on the company itself. -- Solipsist 22:14, 27 Nov 2004 (UTC)

Address bus width

Some other sources on the Internet claim that the addresses of ARM2 were 26-bit wide. Are there any references that it was indeed 24-bit wide, as stated in the article?

"Many people are of the opinion that it is a very "pure" RISC implementation..."

So name some of the "many people". What makes it "very pure"? What makes it a more "pure" RISC than, say, the MIPS? ARM has a number of "impure" features, for example load/store multiple.

The statement lacks substance. Mirror Vax 11:13, 26 Apr 2005 (UTC)