Symmetric multiprocessing
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Symmetric Multiprocessing, or SMP, is a multiprocessor computer architecture where two or more identical processors are connected to a single shared main memory. Most common multiprocessor systems today use an SMP architecture.
SMP systems allow any processor to work on any task no matter where the data for that task is located in memory; with proper operating system support, SMP systems can easily move tasks between processors to balance the work load efficiently. On the downside, memory is much slower than the processors accessing them, and even single-processor machines tend to spend a considerable amount of time waiting for data to arrive from memory. SMP makes this worse, as only one processor can access memory at a time; it is possible for several processors to be starved.
SMP is only one style of multiprocessor machines, others include NUMA which dedicates different memory banks to different processors. This allows processors to access memory in parallel, which can dramatically improve memory throughput if the data is localized to specific processes (and thus processors). On the downside, NUMA makes the cost of moving data from one processor to another more expensive, meaning that balancing a workload is more expensive. The benefits of NUMA are limited to particular workloads, notably on servers where the data is often associated strongly with certain tasks or users.
Other systems include asymmetric or asymmetrical multiprocessing, in which separate specialized processors are used for specific tasks; and clustered multiprocessing (e.g. Beowulf), in which not all memory are available to all processors. The former is not widely used or supported (though the high-powered 3d chipsets in modern videocards could be considered a form of asymmetric multiprocessing), while the later is used fairly extensively to build very large supercomputers.
SMP has many uses in science, industry, and business where software is usually custom programmed for multithreaded processing. However, most consumer products such as word processors and computer games are not written in such a manner that they can gain large benefits from SMP systems. For games this is usually because writing a program to increase performance on SMP systems will produce a performance loss on uniprocessor systems, which comprise the largest percentage of the market. Due to the nature of the different programming methods, it would generally require a separate project to support both uniprocessor and SMP systems with maximum performance. Programs running on SMP systems do, however, experience a performance increase even when they have been written for uniprocessor systems. This is because hardware interrupts that usually suspend program execution while the kernel handles them can run on an idle processor instead. The effect in most applications (e.g. games) is not so much a performance increase as the appearance that the program is running much more smoothly. In some applications, particularly software compilers and some distributed computing projects, one will see an improvement by a factor of (nearly) the number of additional processors.
This of course assumes that the OS supports SMP; if it does not, then the additional processors remain idle and the system functions as a uniprocessor system.
Entry level servers and workstations with two processors dominate the SMP market today. The most popular entry level SMP systems use the x86 instruction set architecture and are based on Intel’s Xeon processors or AMD’s Athlon MP, Athlon 64 X2 or Opteron 200 series processors. Other readily available non-x86 processor choices in the same market are the Sun Microsystems UltraSPARC, Fujitsu SPARC64, SGI MIPS, Intel Itanium, Hewlett Packard PA-RISC, Hewlett-Packard (formerly Compaq formerly Digital Equipment Corporation) Alpha, IBM's POWER and Apple computer PowerPC processors. In all cases, these systems are available in uniprocessor versions as well.
Mid level servers using between four to eight processors can be found using the Intel Xeon MP, AMD Opteron 800 series and the above mentioned UltraSPARC, SPARC64, MIPS, Itanium, PA-RISC, Alpha and POWER processors. High end systems with sixteen or more processors are also available with all of the above processors.
The largest of the large SMP systems is the Cray Research X1, which can be configured off the shelf with as many as 4096 processor packages with four custom designed processor cores per SMP node and a maximum of 32 TiB of memory leading to 52.4 TFLOPS of performance. While such a system is available for purchase to date it is believed that none have been purchased, with most customers of the system choosing smaller configurations. This gives the fastest single SMP system the position of twenty nine on the list of the world's Top 500 Supercomputers, a 504 processor Cray X1 at the Oak Ridge National Laboratory.
SMP had been around for some years in the RISC market before penetrating the x86 market; where with the exception of a few rare 486 systems the x86 SMP market began with the Intel Pentium processor supporting up to two processors, and later the Intel Pentium Pro expanded SMP support with up to four processors natively, and systems with as many as two thousand Pentium Pro processors were built. Later the Intel Pentium II, Intel Pentium III and AMD Athlon MP processors could be used with up to two processors in a system, and Intel Pentium II Xeon and Intel Pentium III Xeon processors could be used with up to four processors in a system natively, and although several much larger were built they were all limited by the physical memory addressing limitation of 64 GiB. With the introduction of 64 bit memory addressing on the AMD64 and EM64T capable processors released recently this allows systems to address much larger amounts of memory so that we will not reach their addressable limitation of 16 EiB in the foreseeable future.de:Symmetrisches Multiprocessing fr:Symmetric multiprocessing it:Multiprocessore simmetrico nl:SMP ja:対称型マルチプロセッサ pl:SMP zh:对称多处理机