MOS Technology 6502

The MOS Technology 6502 is an 8-bit microprocessor designed by MOS Technology in 1975. When it was introduced it was the least expensive full featured CPU on the market by far, at about 1/6th the price, or less, of competing designs from larger companies such as Motorola and Intel. It was nevertheless faster than most of them, and, along with the Zilog Z80, sparked off a series of computer projects* that would eventually result in the home computer revolution of the 1980s. The 6502 design was originally second-sourced by Rockwell and Synertek and later licensed to a number of companies; it is still made for embedded systems.

(* See the list of home computers by category, which clearly shows the market divide between the 6502 and the Z80.)

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A MOS 6502 processor in a DIL-40 plastic package.

Contents

History and use

The 6502 was designed primarily by the same team that had designed the Motorola 6800. After quitting Motorola en-masse, they quickly designed the 6501, a completely new design that was nevertheless pin-compatible with the 6800. Motorola immediately sued, and although today the case would have been dismissed out of hand, the damage to MOS was enough for them to agree to stop producing the 6501.

The result was the "lawsuit-compatible" 6502, differing only by a pinout re-arrangement unusable in a 6800 motherboard; now Motorola was apparently no longer interested. However this left MOS with the problem of getting new developers onto the system, so in response engineer Chuck Peddle designed the KIM-1 single-board computer. Much to their surprise, the KIM-1 sold in huge numbers to hobbyists and tinkerers as well as the intended market of engineers. The related Rockwell AIM 65 control/training/development system also did well. Yet another roughly similar design was the Synertek SYM-1.

The 6502 was released to the market in September 1975 at $25, while the 6800 and Intel 8008 were selling for $179. At first many people thought it was some sort of a scam, but before the show was over both Motorola and Intel had dropped their prices to $79. Instead of saving them, the 6502 was now legitimized and started selling by the hundreds.

The 6502 had one feature that made it particularly good for a home computer system, a small delay in which it was guaranteed to not be accessing the bus. Video display hardware could use this period to read out a line of the screen without having the 6502 pause while this happened. In general terms this sped up the performance of a system using the 6502 by about 25%.

One of the first "public" uses for the design was the Atari 2600 videogame console. The 2600 used an offshoot of the 6502 called the 6507, which had fewer pins and could address only 8 KB of RAM as a result. Millions would be sold in this form. The 6502 was next used in the Apple II family, and then quickly appeared in various Commodore and Atari home computers, the BBC Micro, and a huge number of other designs now lost to history. The 6510, a direct successor to the 6502, was the CPU utilized in the extremely popular Commodore 64 home computer.

Another important use of the 6502 was in the Nintendo Famicom, a Japanese video game console. Its North American and European equivalent, the Nintendo Entertainment System, also got the 6502. The 6502 used in the NES was a modified version (called 2A03 in NTSC-consoles and 2A07 in PAL-consoles the difference being different clock divider) that was produced solely for Nintendo. The custom NES processor lacked the 6502's decimal mode but added 22 memory-mapped registers for sound generation, joypad reading and sprite dma.

The efficient design of the 6502 also inspired the principal designers of the ARM RISC processor, and so the legacy of the 6502 may be said to transcend the original processor (family) since its spirit lives on in the ARM design, used in several desktop computers as well as a plethora of handheld and other embedded systems, and sold as an IP block to be used in Systems-on-chip products.

Description

The 6502 is an 8-bit processor with a 16-bit address bus. The internal logic runs at the same speed as the external clock rate, but the seemingly slow clock speeds, typically 1 MHz, were actually competitive with other CPUs running four times as fast because it is a pipelined static processor, and the others of its time were microcoded and had internal speeds comparable with the 6502 (the Z80 internal clock, for instance, was divided by four). Although this may sound like a "trick", it had the side effect of lowering the speed requirement of the peripherals attached to the CPU, thus lowering overall system cost; an important factor in getting design wins in the very price sensitive game console and home computer markets.

Unlike the Intel 8080 and similar microprocessors, the 6502 had very few registers. At the time RAM was faster than CPUs, so it made sense to optimize for RAM access rather than increase the number of registers on a chip. Inside was one 8-bit accumulator register (A), two 8-bit index registers (X and Y), an 8-bit status register (SR), an 8-bit stack pointer (SP), and a 16-bit program counter (PC). The subroutine call/scratchpad stack's address space was hardwired to memory page $01, i.e. the address range $0100–$01FF (256–511). Software access to the stack was done via four implied addressing mode instructions whose function were to push or pop (pull) the accumulator or the processor status register.

Although all operations took between 2 and 7 cycles, a simplification made in design meant that the 6502 performed a memory access every cycle. According to the original design criteria this wasn't a problem due to the speed advantage of RAM over the CPU. For the microcomputers of the mid-80s this proved a serious disadvantage as slow memory access, especially in systems with a unified memory architecture, would often require CPUs to be significantly underclocked.

The chip used the index and stack registers effectively with several addressing modes, including a fast "direct page" or "zero page" mode that accessed memory locations from address 0 to 255 with a single 8-bit address (it didn't have to fetch a second byte for the address) – code for the 6502 used the zero page much as code for other processors would have used registers. For obvious reasons, in most 6502-based microcomputers with an operating system the OS itself used almost the entire zero page, leaving perhaps a handful of locations for the user.

Addressing modes also included implied (1 byte instructions); absolute (3 bytes); relative (2 bytes); accumulator (1); indirect,x and indirect,y (2); and immediate (2). Absolute mode was a general-purpose mode. Relative was used for conditional branch instructions, which could move the program counter up to 128 bytes forward or backward. Accumulator mode used the accumulator as an effective address, and didn't need any operand data. Immediate mode used an 8-bit literal operand.

The indirect modes were useful for array processing and other looping. With the indirect,y mode, the 8-bit Y register was added to a 16-bit base located in zero page memory (a byte in the opcode denoted the zero page location). The 8-bit X and Y registers were used as offsets rather than 'normal' index register usage. Incrementing X or Y in order to walk the array was a two-cycle 8-bit operation, even though the array might be located anywhere in 16-bit address space (given the 16-bit base read from the zero page). This is where the 6502 differs most from the Motorola 6800. A superficial glance at the 6502's specs telling that there are only 8-bit index registers is thus quite misleading.

See the Hello world! article for a simple but characteristic example of 6502 assembly language.

Dubious features

6502s are almost notorious for having a variety of undocumented instructions, which vary from one design to the next. The instruction decoding in the 6502 is implemented by a hardwired logic array (Similar to a Programmable Logic Array) which is only defined for valid opcodes. The roughly 32 undocumented opcodes trigger several valid instructions at once, leading to unexpected results.

The 6502's indirect jump instruction, JMP (xxxx), was broken. If the address was hexadecimal xxFF, the processor would not access the address stored in xxFF and xxFF+1, but rather xxFF and xx00. The 6510 did not fix this bug, nor was it fixed in any of the other NMOS versions of the 6502 such as the 8502 and the 2A03. Bill Mensch at the Western Design Center was the first to fix it, in the 65C02 CMOS derivative; he then went on to design the 65816 processor, a 16-bit successor to the 65C02 as well as a rare hybrid offshoot called the 65802 which was the 65816 in a 65C02 pin compatible package with memory addressing restrictions.

Acceleration

Many users of 1 MHz 6502-based systems soon wished their computers could go faster. A number of companies sold replacement hardware to speed up those systems. Generally, 6502 system accelerators were based on:

6502 or 65C02 chips running at a faster clock rate
65C816 chips in 6502 emulation mode, running at a much faster clock rate (up to 20 MHz)
the 4MHz and 8MHz Zip Chip made by Zip Technology and the 10MHz Rocket Chip made by Bits and Pieces used onboard cache RAM to speed up processing of frequently accessed data while remaining compatible with a 1MHz motherboard. Zip Technology's patent #4,794,523 forced Bits and Pieces to cease manufacturing the Rocket Chip.

6502 Trivia

In the science fiction movie The Terminator from 1984, starring Arnold Schwarzenegger, the audience at one point is treated to a view through the T-800 Model-101 robot character's eye/camera display, where a 6502 assembly/machine code program fragment is scrolling down the screen. The actual code shown is the screen output of a checksum program for the Apple II, published in "Nibble" Magazine.

Bender, a fictional android "industrial robot" manufactured in 2998 AD, and a main character in the animated TV series Futurama, was revealed to have a 6502 as his "brain", in the episode "Fry & the Slurm Factory."

As of September 2004, 29 years after the 6502's introduction, the University of Tasmania's School of Computing still uses the processor to teach assembly language, in the Schools's course on Computer Organization and Architecture.

References

Mansfield, Richard (1983). Machine Language For Beginners. (http://www.atariarchives.org/mlb/) Personal Computer Machine Language Programming For The Atari, VIC, Apple, Commodore 64, And PET/CBM Computers (or, Machine Language Programming For BASIC Language Programmers). Greensboro, North Carolina: Compute! Publications, Inc. Copyright © 1983, Small System Services, Inc. ISBN 0-942386-11-6.