ILLIAC II
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The ILLIAC II was a computer built by the University of Illinois and became operational in 1962.
ILLIAC II had 8192 words of core memory, backed up by 65,536 words of storage on magnetic drums. The core memory access time was 1.8 to 2 µS. The magnetic drum access time was 7 µS. A "fast buffer" was also provided for storage of short loops and intermediate results (similar in concept to what is now called cache). The "fast buffer" access time was 0.25 µS.
The word size was 52 bits.
Floating point numbers used a format with 7 bits of exponent (power of 4) and 45 bits the mantissa.
Instructions were either 26 bits or 13 bits long, allowing packing of up to 4 instructions per memory word.
Innovation
- The ILLIAC II was one of the first transistorized computers. Like the IBM Stretch computer, ILLIAC II was designed using "future transistors" that had not yet been invented.
- The ILLIAC II had a division unit designed by faculty member James E. Robertson, a co-inventor of the SRT Division algorithm.
- The ILLIAC II was one of the first pipelined computers, along with IBM's Stretch Computer. The pipelined control was designed by faculty member Donald B. Gillies.
- The ILLIAC II was the first computer to incorporate Speed-Independent Circuitry, invented by faculty member David E. Muller. Speed-Independent Circuitry is a class of asynchronous digital logic based on the Muller C-Element. This digital logic, being asynchronous, runs at full speed of transistor propagation and requires no clocks.