I²C (for Inter-Integrated Circuit, pronounced I-squared-C) is a serial computer bus invented by Philips (see United States Patent No. 4,689,740 and European Patent Specification No. 0 051 332). It is used to connect low-speed peripherals in an embedded system or motherboard.

The original system was created in the early 1980s as a simple internal bus system for building control electronics with various Philips chips.

I²C uses only two bi-directional lines, clock and data, both running at +5 V and pulled high with resistors. The bus operates in several modes, the most common being the 100 kbit/s standard mode and a 10 kbit/s low-speed mode. Clock frequencies down to zero are allowed. More recent I²C specification support the following data speeds: standard (100 kbit/s), fast (400 kbit/s) and high (3.4 Mbit/s) with 10 bit addressing.

Buses of this type became popular when engineers realized that much of the expense of an integrated circuit results from the size of the package and the number of pins. A large package has more pins, thus more assembly steps when manufactured, more area on a printed circuit board, more weight, and more connections to fail. All of those cost money to make, assemble and test, and can increase operational expenses (fuel), or decrease convenience (weight is critical in cell-phones, for example).

A particular strength of I²C is that a microcontroller can control a network of devices chips with just two general-purpose I/O pins and software. Over 1000 master and/or slave devices (depending on the mode used) can co-exist on the same two line bus.

Although much slower than most bus systems, the low expense is excellent for peripherals that have to exist, but need not be fast. The bus is often used for built-in-tests, volume, tone and color balance controls, low-speed analog-to-digital and digital-to-analog controllers, real-time-clocks, small non-volatile memories (used to preserve user-settable options), control of clock-generators (for computers that can vary their clock speeds) and integrated circuits that combine a shift-register and power transistors. Chips can also be added to or removed from the bus while the system is running, which makes I²C ideal for environments requiring hot swappable components.

The basic bus has a seven-bit address space, allowing up to 112 nodes on one bus (16 of the 128 addresses are reserved). In 1992 the first standardized version was released, v1.0. This added a new fast mode at 400 kbit/s and a ten-bit addressing mode to support up to 1024 nodes. v2.0 from 1998 added high-speed mode at 3.4 Mbit/s, while reducing the voltage and current requirements when run in that mode (thus saving power as well as being faster). The latest v.2.1 from 2001 is a minor cleanup of 2.0.

I²C was also used as the basis for ACCESS.bus and VESA's monitor data interface (Display Data Channel or DDC) - both for low-speed control and built-in-test.

The System Management Bus or SMBus is similar to the I²C bus, but with differences in clock frequency range and voltage levels, and an optional extra interrupt-request wire.

Contents

1 I2C in Linux 2 I2C in QDOS/Minerva 3 See also 4 External links

I²C in Linux

In Linux, I²C is handled with a specific kernel module for the specific card. Extensive documentation on how to write I²C client can be found in the kernel docs and in the header /usr/include/linux/i2c.h.

I²C in QDOS/Minerva

In Sinclair QDOS and Minerva QL operating systems I²C is supported via a set of extensions provided by TF Services.

See also

• I²S

External links

• Introduction to I2C (http://embedded.com/story/OEG20010718S0073)
• Philips I2C specifications (http://www.semiconductors.philips.com/buses/i2c/)
• I²C Bus / Access Bus (http://www.interfacebus.com/Design_Connector_I2C.html)de:I2C

nl:IIC-bus