RCA 1802
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The RCA (CDP)1802 (aka RCA COSMAC*, COSMAC 1802) is an 8-bit CMOS microprocessor (µP) introduced by RCA in early 1976, and presently being manufactured by Harris Semiconductor. The 1802 has an architecture quite different from most other 8-bit microprocessors.
(* COSMAC is an acronym for COmplementary Silicon Metal-oxide Conductor, which was RCA's term for its first CMOS (COS/MOS) semiconductor technology.)
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Introduction
The RCA 1802—which is actually the one-chip implementation of the earlier two-chip RCA 1801—has a static CMOS design with no minimum clock frequency, so that it can be run at very low speeds and low power. It has an 8-bit parallel bus with a bidirectional data bus and a multiplexed address bus (i.e., the data bus and address bus take turns in using the physical bus lines, by accessing the bus lines in different clock cycles). It has a bit-programmable output port, and four input pins which are directly tested by branch instructions. Its I/O mode is flexible and programmable, and it has a single-phase clock with an on-chip oscillator. Its register set consist of sixteen 16-bit registers. The program counter (PC) can reside in any of these, providing a simple way to implement multiple PCs, pointers, or registers.
Applications
From the outset the 1802 has also been available fabricated in Silicon on Sapphire semiconductor process technology, which gives it a degree of resistance to radiation and electrostatic discharge (ESD). Along with its extreme low-power abilities, this makes the chip well-suited in space applications (also, at the time the 1802 was introduced, very few, if any, other radiation-hardened µPs were available in the market). The 1802 was used in the Voyager, Viking, and Galileo spacecraft, and has been widely used in Earth-orbiting satellites.
A number of early microcomputers were based on the 1802, including the COSMAC ELF, COSMAC VIP, ELF II, and SuperELF, as well as the RCA Studio II video game console (one of the first consoles to use bitmapped graphics).
Technical description
Registers and I/O
An important feature of the 1802 is the register file of sixteen registers of 16 bits each. Using the SEP instruction, you can select any of the 16 registers to be the program counter; using the SEX instruction, you can select any of the 16-bit registers to be the index register. Register R0 has the special use of holding the memory address for the built-in DMA controller.
The processor has 5 special I/O lines. There's a single Q output that can be set with the SEQ instruction and reset with the REQ instruction. There are four external flag inputs: EF1, EF2, EF3, EF4 and there are 8 dedicated branch instructions to conditionally branch based on the state of those input lines. The EF and Q lines were typically overused on RCA 1802 based hobbyist computers because of the lines' favorable handling. It was typical for the Q line to drive a status LED, a cassette interface, an RS-232 interface, and the speaker. This meant that the user could actually hear RS-232 and cassette data being transmitted.
Subroutine calls
The processor do not have standard subroutine CALL immediate and RET instructions, though they can be emulated. The register file makes possible some interesting subroutine call and return mechanisms, though they are better suited to small programs than general purpose coding. A few commonly used subroutines can be called quickly by keeping their address in one of the 16 registers; the SEP instruction is used to call a subroutine pointed to by one of the 16 bit registers and RET to return. Before a subroutine returns, it jumps to the location immediately preceding its entry point so that after the RET instruction returned control to the caller, the register will be pointing to the right value for next time. An interesting variation of this scheme is to have two or more subroutines in a ring so that they are called in round robin order. On early hobbyist computers, tricks like this were commonly used in the horizontal refresh interrupt to reprogram the scan line address to repeat each scan line 4 times for the video controller. Computed subroutine calls were no problem because all CALL instructions were indexed (some processors only had CALL immediate).
DMA; Clock cycles
The built-in DMA controller is typically used to load or view program memory, depending on the state of the write enable switch, after the processor has been reset but still being held in a special wait state.
Clock cycle efficiency is poor in comparison to most other similar processors. Eight clock cycles makes up one machine cycle. Most instructions take two machine cycles to execute.
Support chips
In early microcomputers the companion CDP1861 graphics video display controller chip (1861 for the NTSC video format, 1864 variant for PAL) used the built-in DMA controller to display bitmapped graphics. This chip could display 64 pixels horizontally and 128 pixels vertically, though by reloading the R0 register, the resolution could be reduced to 64×64 or 64×32 to use less memory or to make square pixels. Since the frame buffer was similar in size to the memory size, it was not unusual to display your program/data on the screen allowing you to watch the computer "think" (i.e. process its data). Programs which ran amuck and accidentally overwrote themselves could be spectacular. Although the faster version of 1802 could operate at 5 MHz (at 5 V, faster at 10 V), it was usually operated at 3.58 MHz/2 to suit the requirements of the 1861 chip which gave a speed of a little over 100,000 instructions per second.
External links
- CDP1802 datasheet (http://homepage.mac.com/ruske/cosmacelf/cdp1802.pdf) (PDF)
- COSMAC assembly language programming (http://sbrune.com/COSMAC/) (table of contents in HTML; document itself in PDF)
- COSMAC ELF (http://www.cosmacelf.com/)
Minor parts of this article were originally based on material from the Free On-line Dictionary of Computing, which is licensed under the GFDL.fi:RCA 1802