OISC
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The OISC is the One Instruction Set Computer, by humorous analogy with RISC (Reduced Instruction Set Computer) and CISC (Complex Instruction Set Computer). The instruction set of the OISC is even smaller than that of a RISC: it contains exactly one instruction.
Typically, the one instruction performs the 'subtract and branch unless positive' operation, sometimes abbreviated subnp or subleq. The operation has three parameters. subleq(a,b,c) subtracts the contents of memory location a from the contents of b, storing the result back into b, and then, if the result was negative or zero, transferring control to the location specified by the address stored in c.
Other common instructions can be specified in terms of subleq. For example, an unconditional branch is
JMP c == subleq Z, Z, c
where Z is any location that was previously initialized to contain 0. (The branch is unconditional regardless of whether Z previously contained 0, but to prevent overwriting the contents of Z, a special reserved location should be used.)
In any instruction, the conditional branch can be suppressed by pointing it at the instruction that would have been executed next in any case. If the parameter c is missing, it is implied that this is the case.
Addition can be performed as reversed subtraction:
ADD a,b == subleq a, Z
subleq Z, b
subleq Z, Z
(Here all the branches have been suppressed.) The first instruction computes the negation of a and stores it in location Z. The second instruction subtracts -a from b; the third instruction restores the value 0 to Z. A copy instruction can be implemented similarly:
STO a,b == subleq b,b
subleq a,Z
subleq Z,b
subleq Z,Z
Any desired arithmetic test can be built out of the ≤0 relation. For example, a branch-if-zero condition can be assembled from the following instructions:
BEQ b,c == subleq b, Z, L1
subleq Z, Z, OUT
L1:subleq Z, Z
subleq Z, b, c
OUT:...
Another OISC is the 'MOVE Computer'. The only instruction is MOVE, which moves the contents of one memory location to another memory location. Arithmetic is performed using a memory mapped ALU, and jumps are performed using a memory-mapped program counter.
OISC is easily shown to be Turing-complete.
References
- The Retrocomputing Museum (http://catb.org/~esr/retro/)
- The Ultimate RISC (http://www.cs.uiowa.edu/~jones/arch/risc/)