Low voltage differential signaling
|
|
Low voltage differential signaling, or LVDS, is an electrical signalling system that can run at very high speeds over cheap, twisted-pair copper cables. It was introduced in 1994, and has since become very popular in computers, where it forms part of very high-speed networks and computer buses.
| Contents |
Differential vs. single-ended signalling
LVDS is a differential signalling system, which means that it transmits two different voltages which are compared at the receiver. This is unlike the more common technique of single-ended signalling, in which the transmitter generates a single voltage that the receiver compares with a fixed reference voltage, both relative to a common ground connection shared by both ends.
The widely used RS-232 system is an example of single-ended signalling, which uses ±12 V to represent a signal, and anything less than ±3 V to represent the lack of a signal. The high voltage levels give the signals some immunity from noise, since few naturally occurring signals can create that sort of voltage. They also have the advantage of requiring only one wire per signal. However, they also have a serious disadvantage: they cannot run at high speeds. The effects of capacitance and inductance, which filter out high-frequency signals, limit the speed. Large voltage swings driving long cables also require significant power from the transmitting end. This problem can be reduced by using smaller voltages, but then the chance of mistaking random environmental noise for a signal becomes much more of a problem. Another difficulty is the electromagnetic interference that can be generated by a single-ended signalling system which attempts to operate at high speed.
LVDS uses the difference in voltage between two wires to signal information. The transmitter injects a small current, nominally 3.5 milliamperes, into one wire or the other, depending on the logic level to be sent. The current passes through a resistor of about 100 to 120 ohms (matched to the characteristic impedance of the cable) at the receiving end, then returns in the opposite direction along the other wire. From Ohm's law, the voltage difference across the resistor is therefore about 350 millivolts. The receiver senses the polarity of this voltage to determine the logic level.
The small amplitude of the signal reduces the effects of capacitance and inductance, and reduces the amount of radiated electromagnetic noise. The system also has a low subsceptibility to noise, because distant noise sources tend to add the same amount of voltage (called common-mode noise) to both wires, so the difference between the voltages remains the same. Manufacturers can further reduce noise by twisting the two wires of a pair together (as in Cat-3 Ethernet cables), so that any noise induced in one half-twist tends to cancel the noise induced in the neighbouring half-twist. The low common-mode voltage (the average of the voltages on the two wires) of about 1.25 V allows LVDS to be used with a wide range of integrated circuits with power supply voltages down to 2.5 V or lower. The low differential voltage, about 350 mV as stated above, causes LVDS to consume very little power compared to other systems. For example, the static power dissipation in the LVDS load resistor is 1.2 mW, compared to the 90 mW dissipated by the load resistor for an RS-422 signal. This power efficiency is maintained at high frequencies because of the low voltage swing.
LVDS is not the only differential signalling system in use. Other examples include differential ECL, PECL, RS-422 and RS-485, but LVDS is currently the only scheme that combines low power dissipation with high speed.
Applications
LVDS only became popular in the latter half of the 1990s. Prior to that point it could signal faster than the computers it was running in, and the need to run twice as many wires for the same amount of data outweighed the speed benefits. Yet multimedia and supercomputer users, both of whom needed to move large amounts of data over links several meters long (from a disk drive to a workstation, for instance) maintained a widespread interest in LVDS.
Two examples of LVDS use in computer buses come from HyperTransport and FireWire, both of which trace their ancestry back to the post-Futurebus work which also led to SCI. LVDS is supported in SCSI standards (Ultra-2 SCSI and later) to allow higher data rates and longer cable lengths. Serial ATA and SpaceWire utilizes LVDS to allow high speed data transfer.
LVDS can also transport video data from graphics adapters to computer monitors, particularly flat panels, using the Flat Panel Display (FPD) Link, LVDS Display Interface (LDI) and OpenLDI standards. These standards allow a maximum pixel clock of 112 MHz, which suffices for a display resolution of 1400 x 1050 (SXGA+) at 60 Hz refresh. A dual link can boost the maximum display resolution to 2048 x 1536 (QXGA) at 60 Hz. FPD-Link works with cable lengths up to about 5 m, and LDI extends this to about 10 m.
SerDes
LVDS is often used for serial data transmission, which involves sending data bit-by-bit down a single wire (as opposed to parallel transmission, in which several bits, usually in multiples of eight, are sent down many wires at once). Its high speed, and its use of in-channel synchronisation, makes it possible to send serial data faster than could be done with a parallel bus, and using fewer wires. The device for converting between serial and parallel data is called a serializer/deserializer, abbreviated to SerDes.
Bus LVDS
When serial data transmission (see SerDes, above) is not fast enough, data can be transmitted in parallel form using an LVDS pair for each bit. This system is called bus LVDS, or BLVDS. Standard LVDS transmitters are designed for point-to-point links, but multipoint bus systems can be made using modified LVDS transmitters with high-current outputs that can drive multiple termination resistors.
SCI-LVD
The present form of LVDS was preceded by an earlier attempt, SCI-LVD, which was a subset of the Scalable Coherent Interconnect (SCI) specified in the IEEE 1596.3 standard. It was designed for interconnecting multiprocessing systems.
Standards
The ANSI/TIA/EIA-644-A (published in 2001) standard defines LVDS. This recommends a maximum data rate of 655 Mbit/s over twisted-pair copper wire, but predicts a possible speed of over 1.9 Gbit/s for an ideal transmission medium.
External links
- Introduction to LVDS (http://www.national.com/appinfo/lvds/0,1798,100,00.html)
References
- An Overview of LVDS Technology, National Semiconductor, AN-971, July 1998.
- LVDS Owner's Manual, National Semiconductor, 3rd Edition, 2004