ILLIAC IV
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The ILLIAC IV was one of the most infamous supercomputers ever, destined to be the last in a series of research machines from the University of Illinois. Key to the ILLIAC IV design was fairly high parallelism with up to 256 processors, used to allow the machine to work on large data sets in what would later be known as vector processing. The machine was finally ready for operation in 1976, after a decade of development that was now massively late, massively over budget, and outperformed by existing commercial machines like the Cray-1.
By the early 1960s computer designs were approaching the point of diminishing returns; machines could be made faster by building more instructions in hardware, but only at tremendous cost. In fact, adding hardware could potentially slow the machine down, as the maximum speed was defined by the signal timing in the hardware, which was in turn a function of the overall size of the machine. The state of the art hardware design techniques of the time used individual transistors to build up logic circuits, so any increase in logic processing meant a larger machine. CPU speeds appeared to be reaching a plateau.
Several solutions to these problems were explored in the 1960s. One, then known as overlap but today known as an instruction pipeline, allows a single CPU to work on small parts of several instructions at a time. Normally the CPU would fetch an instruction from memory, "decode" it, run the instruction and then write the results back to memory. While the machine is working on any one stage, say decoding, the other portions of the CPU are not being used. Pipelining allows the CPU to start the load and decode stages (for instance) on the "next" instruction while still working on the last one and writing it out. Pipelining was a major feature of Seymore Cray's groundbreaking design, the CDC 6600, which outperformed almost all other machines by about ten times when it was introduced.
Another solution to the problem was parallel computing; building a computer out of a number of general purpose CPUs. The "computer" as a whole would have to be able to keep all of the CPUs busy, asking each one to work on a small part of the problem and then collecting up the results at the end into a single "answer". Not all tasks can be handled in this fashion, and extracting performance from multiple processors remains a problem even today, yet the concept has the advantage of having no theoretical limit to speed -- if you need more performance, simply add more CPUs. General purpose CPUs were very expensive, however, so any "massively" parallel design would either be too expensive to be worth it, or have to use a much simpler CPU design.
Westinghouse explored the later solution in a project known as Solomon. They realized that the highest performing computers were being used primarily for math processing in science and engineering, and so decided to focus their CPU design on math alone. They designed a system in which a single main CPU, the "control unit" (CU), handled the instruction stream, while a number of simpler "processing elements" (PEs, today known as an ALU) run math in parallel. Each PE would be fed the same instruction but different data, a concept known as SIMD -- Single Instruction, Multiple Data -- under control of a master clock controlled by the CU. Under a contract from the US Air Force's RADC research arm, they had built a breadboard prototype machine in 1964, but the RADC contract ended and Westinghouse decided not follow it up on their own.
One of the prinicple investigators on the Solomon project, Daniel Slotnick, moved to the University of Illinois and convinced them to continue the project. In 1964 the University signed a contract with DARPA to fund the effort, which became known as ILLIAC IV, following in line from a number of earlier research machines developed there. Burroughs was the primary partner and would provide both the high-speed hard disk systems and build the units themselves, and a Burroughs B6500 mainframe would be used as a "front end". Texas Instruments was contracted for various ECL integrated circuits, ILLIAC was to be the first machine to make widespread use of ECL. Development started in 1965, and a first-pass design was completed in 1966.
The design goal called for a computer with the ability to process 1 billion instructions per second, or in today's terminology, 1GFLOP. To do this the basic design would require 256 PEs running on a 13MHz clock, driven by four CUs. The ILLIAC was a 64-bit design, and each PE was given 2048 -words of 240ns thin-film memory (later replaced with semiconductor memory) for storing results. The CU could access all of the memory while the PEs could see only their own, another simplification that made the PEs less expensive. Each PE also had 6 general purpose registers, which they could share with its eight neighbours by loading another special register with the value to be moved.
Originally they intended to house all 256 PEs in a single large mainframe, but the project quickly ran behind schedule. Instead, a modification was made to divide the ALUs into quadrants of 64 with a single CU each, housed in separate cabinets. Eventually it became clear that only one quadrant would become available in any realistic timeframe, limiting performance from 1GFLOP to about 200MFLOP.
Work at the University was primarily aimed at ways to efficiently fill the PEs with data. Unless the "problem" being fed into the computer could be parallelized in SIMD fashion, the ILLIAC would be no faster than any other system. In order to make this as easy as possible, several new computer languages were created; IVTRAN and TRANQUIL were parallelized versions of FORTRAN, and Glypnir was a similar conversion of ALGOL. Generally these languages provided support for loading arrays of data "across" the PEs to be executed in parallel, and some even supported the unwinding of loops into array operations.
When the computer was being built in the late 1960s, it was met with hostility by protesters who were suspicious of the University's tie with the Department of Defense, and felt that the University had sold out to a conspiracy. The protests reached a boiling point on May 9, 1970, in a day of "Illiaction". After the August 24th bombing (http://www.leemark.com/featuredcontent/sterling/sterling.html) at a University of Wisconsin mathematics building just three months later the University decided to back out of the project, and have it moved to a more secure location. The work was picked up by NASA, then still cash-flush in the post-Apollo years and interested in almost any "high tech". They formed a new Advanced Computing division, and had the machine moved to Moffett Field, California, home of Ames Research Center.
The move slowed development, and the machine was not completed until 1972. By this time the original $8 million estimated from the first design in 1966 had risen to $31 million, while the performance had dropped even further, from 1GFLOP to perhaps 100MFLOP with peaks of 150. On problems that could be parallelized the machine was still the fastest in the world at the time, ouperforming the CDC 7600 by two to six times. For NASA the machine was "perfect", as its performance was tuned for programs running the same operation on lots of data, which is exactly what computational fluid dynamics is all about.
When the ILLIAC was finally turned on in 1972 it was found to be barely operable, failing continually. Efforts to correct the reliability allowed it to run its first complete program in 1974, and go into full operation in 1975. Even "full operation" was somewhat limited, the machine was operated only Monday to Friday and had up to 40 hours of planned maintenance a week. The first full application was run on the machine in 1976, the same year the Cray-1 was released with roughly the same performance. Nevertheless the ILLIAC was increasingly used over the next few years, and Ames added their own FORTRAN version, CFD. The machine was eventually decommissioned in 1982, and NASA's advanced computing division ended with it.
Although the ILLIAC effort ended in uninspiring results, attempts to understand the reasons for the failure of the ILLIAC IV architecture pushed forward research in parallel computing, leading the way for successful massively-parallel machines such as the Thinking Machines CM-1 and CM-2. Likewise the basic concept of array processing was clearly an important step forward in scientific computing, and a number of designs started to take this one key concept and simplify it. The CDC Star, TI ASC and famous Cray-1 were all high-performance machines based on single-CPU vector processors, inspired by the ILLIAC design.
See also
External links
- The ILLIAC IV System 307 (http://research.microsoft.com/users/GBell/Computer_Structures_Principles_and_Examples/csp0322.htm) – From Computer Structures Principles and Examples (C. Gordon Bell et.al.)
- ILLIAC IV CFD (http://www.hpjava.org/talks/beijing/hpf/introduction/node4.html)