Electronic design automation
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Electronic design automation (EDA) is the category of tools for designing and producing electronic systems ranging from printed circuit boards (PCBs) to integrated circuits. This is sometimes referred to as ECAD (electronic computer-aided design).
The term EDA is also used as an umbrella term for computer-aided engineering, computer-aided design and computer-aided manufacturing of electronics in the discipline of electrical engineering. This usage probably originates in the IEEE Design Automation Technical Committee.
EDA has rapidly increased in importance with the continuous scaling of semiconductor technology. (See: Moore's Law.) EDA companies' clients are primarily semiconductor companies that design chips using EDA software. But also physical manufacturers (fabs), largest of which are TSMC, IBM, Intel.
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Product areas (incomplete)
EDA is divided into many (sometimes overlapping) sub-areas. They mostly align with the path of manufacturing of the chips from design to mask generation.
- Design and Architecture: design the chip's schematics, output in Verilog, VHDL, SPICE and other formats.
- Intellectual property blocks: provide pre-programmed design elements.
- Simulation: simulate circuit's work and detect any shortcomings
- Place and route, PR: placement of circuit elements on the chip layout, route all wires.
- Physical verification, PV: checking if design is physically manufacturable and resulting chips will not have any functioning preventing physical defects and meet original specifications
- Design rules checking, DRC: checks number of rules of geometric and connectivity nature specified by manufacturer
- Layout versus schematic, LVS: -- checks if designed chip layout matches schematics from specification
- Mask data preparation, MDP -- generation of actual lithography photomask used to physically manufacture the chip
- Resolution enhancement techniques, RET: methods of increasing of quality of final photomask
- Optical proximity correction, OPC: up-front compensation for diffraction and interference effects occurring later when chip is manufactured using this mask
- Mask generation: generation of flat mask image from hierarchical design
- Resolution enhancement techniques, RET: methods of increasing of quality of final photomask
Largest companies
| Company | Location | Market Value | Logo |
|---|---|---|---|
| Cadence Design Systems | San Jose, California | $3.5 billion | Missing image CadenceDesignSystemsLogo.GIF Image:CadenceDesignSystemsLogo.GIF |
| Synopsys | Mountain View, California | $2.5 billion | Missing image SynopsysLogo.GIF Image:SynopsysLogo.GIF |
| Mentor Graphics | Wilsonville, Oregon | $1.0 billion | Missing image MentorGraphicsLogo.GIF Image:MentorGraphicsLogo.GIF |
| Magma Design Automation Inc | Santa Clara, California | $387 million | Missing image MagmaDALogo.gif Image:MagmaDALogo.gif |
External links
- EDA Consortium (http://www.edac.org/)
- EDA Industry Working Groups (http://www.eda.org) - Non-Profit standards organisation
- EDA Cafe (http://www.edacafe.com) - Commercial web site trying to serve as a portal to the EDA industry
- DAC (http://www.dac.com) - The Design Automation Conference is a premier event for Electronic Design Automation
- gEDA (http://geda.seul.org) - free software EDA system
- Ing.-Buero FRIEDRICH (http://www.ibfriedrich.com) - TARGET 3001! EDA system