DEC PRISM
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PRISM, for Parallel Reduced Instruction Set Machine, was a 32-bit RISC CPU design from Digital Equipment Corporation (DEC). It was the final outcome of a number of DEC-internal research projects from the 1982-85 time-frame, and was at the point of delivering silicon in 1988 when management cancelled the project. The next year work on the DEC Alpha started.
In the early 1980s DEC was a huge success, cash flush and infused with a feeling of invincibility. Projects were started all over the company to chase the "next big thing", with little or no overall direction or managerial oversight. RISC computing was one of those next big things, and in the period from 1982 to 1985 no less than four attempts were made to create a RISC chip at different divisions. Titan from DEC's Western Research Laboratory (WRL) in Palo Alto, California was a high-performance ECL based design that started in 1982. SAFE (Streamlined Architecture for Fast Execution) was a lower-end design from Alan Kotok (of Spacewar fame) and Dave Orbits that started in 1983. HR-32 (Hudson, RISC, 32-bit) started in 1984 by Rich Witek and Dave Dobberpuhl at the Hudson fab, and the same year Dave Cutler started the CASCADE project in Seattle. Most of these projects were examining the problems of running DEC's existing cash cow, the VAX, on a RISC CPU. The VAX is often used as the canonical example of the "perfect" CISC instruction set, so such a conversion would not be simple.
Eventually Cutler was asked to define a single RISC project in 1985. By this time DEC was already working with the MIPS R3000 design for workstation machines, and had recently formed the Advanced Computing Environment consortium to popularize MIPS-based machines. However, Not Invented Here ran rampant, and the PRISM project went ahead anyway. In August 1985 the first draft of a high-level design was delivered, and work began on the detailed design. However the design was still under construction in 1988 when DEC decided to pull the plug and continue with the MIPS designs, which led to Cutler leaving DEC to join Microsoft.
On the integer side of things, the PRISM was a "me too" design in many ways, and displays a considerable similarity to the MIPS designs. Of the 32-bit instructions, the 6 highest and 5 lowest bits were the instruction, leaving the rest of the word for encoding either a constant or register locations. Sixty-four 32-bit registers were included, as opposed to thirty-two in the MIPS, but usage was otherwise similar.
The PRISM design was notable for one aspect of its instruction set, however, the inclusion of a number of vector processing instructions. Supporting this were an additional sixteen 64-bit vector registers that could be used in a variety of ways.
Another unique feature of the PRISM was Epicode, for extended processor instruction code, a software-defined set of microcode instructions. The idea was to allow the processor to include internal code duplicating the more commonly used instructions from the VAX, a feature would later be copied into the Alpha design as PALcode.
DEC PRISM should not be confused with Apollo PRISM, which was used in Apollo's DN10000 workstations.