IBM 1620 Model I
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The IBM 1620 Model I was the original implementation of the IBM 1620 scientific computer, introduced in 1959.
This unit (commonly called "1620" until the Model II was introduced) was produced as inexpensively as IBM could make it, in order to keep the price low. One industry magazine (Datamation) mentioned that the 1620 was the first IBM computer for which the basic system could be leased for a monthly rate less than its number.
It did not even have conventional ALU hardware: all arithmetic was done by table lookup in core memory. Addition and Subtraction used a 100 digit table (@ address 00300..00399). Multiplication used a 200 digit table (@ address 00100..00299). In the basic machine division used software subroutines, but optional divide hardware could be installed using a repeated subtraction algorithm. Floating point arithmetic instructions were an available option (if the divide option was installed).
| Missing image IBM_1620_Model_1.jpg Image:IBM 1620 Model 1.jpg |
| IBM 1620 Model I Level G, running. |
| Drawing showing internal layout of "gates". |
The console typewriter was a modified Model B1, which typed at only 10 characters per second. (This typewriter had a very 'nasty' habit of breaking off its "0" hammer and throwing it across the room in the middle of a long core dump!)
The first 20,000 decimal digits of Core memory were internal to the CPU itself (which reduced the floor space requirements of the basic system). Expansion to either 40,000 or 60,000 decimal digits required the addition of an IBM 1623 Memory unit. The Memory cycle time was 20μs (i.e., the memory speed was 50kHz = 1/20th of a MHz). A Memory Address Register Storage (MARS) Core memory read, clear, or write operation took 2μs and each write operation was automatically (but not necessarily immediately) preceded by a read or clear operation of the same "register(s)" during the 20μs Memory cycle.
The central processor clock speed was 1MHz, which was divided by 20 by a 10 position ring counter to provide the system timing/control signals.
Instructions took 8 Memory cycles (160μs) to fetch and a variable number of Memory cycles to execute. Indirect addressing added 4 Memory cycles (80μs) for each level of indirection.
External links
- System Reference Manual for the IBM 1620 Central Processing Unit, Model 1 (http://www.bitsavers.org/pdf/ibm/1620/A26-5706-3_1620model1cpu.pdf) (PDF)