CMOS
As in NMOS logic, a collection of n-type MOSFETs is arranged in a pull-down network (PDN) between the output and the low-voltage power supply rail. However, unlike NMOS, CMOS also has a collection of p-type MOSFETs (complementary to the n-type) in a pull-up network (PUN) between the output and high-voltage rail, in place of a resistor. As an example, here is a NOR gate in CMOS logic. Note how (in a steady state) only either the PDN or the PUN can be active at any one time. This implies there is no current flow and hence virtually no power dissipation while the circuit is at rest, a major virtue that sets CMOS circuits apart from their NMOS and TTL predecessors.
A
_|_ A B
__| |__ | |
| | _o_ _o_
low__| B |___ ___| |__| |__high
| _|_ | |
|__| |__| |
out
pull-down network pull-up network
Another advantage
of CMOS over NMOS
is that both low-to-high
and high-to-low output
transitions are very
fast since the transistors
have low resistance
when active. This
strong, symmetric
response also makes
CMOS more resistant
to noise.
As switching speeds increase, though, the power dissipation of CMOS begins to be felt. This is because the currents necessary to charge and discharge the various load capacitances cause voltage drops in the transistors. Also, during transitions, for a short time both the PDN and the PUN are partially conductive, which creates direct current flow between the high- and low-voltage rails. The majority of power consumed by CMOS circuits is in fact dissipated during transitions.
History
CMOS circuits were invented in 1963 by Frank Wanlass at Fairchild Semiconductor. Originally a low-power but slow alternative to TTL, CMOS had become the predominant technology in digital integrated circuits some twenty-five years later. This is essentially because area occupation, operating speed, energy efficiency and manufacturing costs have and do continue to benefit from the geometric downsizing that comes with every new generation of semiconductor manufacturing processes. In addition, the simplicity and comparatively low power dissipation of CMOS circuits have allowed for integration densities not possible on the basis of bipolar junction transistors.
Photographs, illustrations and clipart at Classroom ClipArt.com
This
article is licensed
under the GNU
Free Documentation
License. It uses
material from the
Wikipedia articles


